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Apparatus for Measuring a Gate Leakage Current of a Transistor

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Opportunity

Silicon carbide (SiC) MOSFETs are increasingly used in high-power applications like electric vehicles, solar inverters, and motor drives due to their superior switching speeds, efficiency, and breakdown voltages compared to traditional silicon MOSFETs. However, a critical reliability issue arises from their thinner gate oxide, which subjects the oxide to a higher electric field, accelerating gate oxide degradation. Gate oxide failure is a predominant failure mechanism in SiC MOSFETs. Monitoring the gate-source leakage current has been identified as an effective real-time precursor for assessing gate oxide health. A new SiC device typically exhibits an on-state gate-source leakage current in the hundreds of nanoamperes, but this value can escalate to tens of microamperes or even milliamperes after aging, even while the device remains functional. Existing methods for leakage current detection are inadequate. The straightforward approach of measuring voltage across a series gate resistor is limited by practical challenges: it requires amplifiers with exceptional common-mode voltage range, bandwidth, and low input bias current, making it suitable only for end-of-life detection when currents are extreme. Alternative methods using capacitors to integrate leakage charge are error-prone, as the capacitor voltage is influenced by gate voltage transition times and the switching duty cycle, necessitating complex calibration and making the measurement inconvenient and inaccurate. There is a clear need for a robust, sensitive, and duty-cycle-independent method to accurately measure gate leakage current from early to late stages of device aging to enable predictive health monitoring and prevent catastrophic failures in critical power systems.

Technology

The invention provides an apparatus centered on a current mirror circuit integrated into the gate drive path of a MOSFET, specifically a SiC MOSFET. The core innovation is using the current mirror to simultaneously perform the switching operation and monitor the gate-source leakage current. The input branch of the current mirror is connected to receive the gate current, which includes the leakage current during the steady-state on period. This current is mirrored to an output branch where it flows through a sensing resistor. The voltage developed across this sensing resistor is directly proportional to the gate leakage current. A key advantage of the current mirror is that its effective input resistance self-adjusts based on the current magnitude—presenting a high resistance for low leakage currents and a low resistance for high leakage currents—thereby maintaining high measurement sensitivity across a wide range without distorting the gate-source voltage waveform. To preserve fast switching performance, the apparatus incorporates a bypass switch (e.g., a transistor) in parallel with the current mirror. During the initial turn-on transient, this bypass switch activates to rapidly charge the gate capacitance, after which it deactivates, allowing the current mirror to engage for accurate steady-state leakage measurement. Furthermore, a discharging circuit is included to quickly remove charge from the current mirror transistors after switching, significantly shortening the transition time from saturation to linear operation and enhancing the dynamic response of the measurement. This integrated design allows for precise, real-time leakage current sensing that is independent of the gate signal's duty cycle.

Advantages

  • Provides high-sensitivity measurement across a wide range of gate leakage currents, from low nanoampere levels (early aging) to high milliampere levels (late-stage aging).
  • Maintains the integrity of the gate-source voltage waveform, avoiding negative impacts on switching performance that are typical with large series sensing resistors.
  • Significantly improves switching speed through the integrated bypass switch, making performance comparable to conventional gate drive circuits without current mirrors.
  • Enhances dynamic response and reduces measurement settling time via the dedicated discharging circuit.
  • Enables real-time, in-situ monitoring of gate oxide health as a precursor to failure.
  • The sensing operation is independent of the gate signal duty cycle, simplifying calibration and improving accuracy.
  • Simplifies voltage measurement as the sensing resistor's reference node can be connected directly to the MOSFET source, eliminating the need for complex differential measurements.

Applications

  • Predictive health monitoring and condition-based maintenance of SiC MOSFETs in high-reliability power electronics.
  • Integration into gate driver circuits for electric vehicle (EV) traction inverters, onboard chargers, and DC-DC converters.
  • Use in solar photovoltaic (PV) inverters and energy storage systems to enhance system longevity and reliability.
  • Implementation in motor drives for industrial automation, robotics, and HVAC systems.
  • Reliability testing and burn-in equipment for semiconductor power device manufacturers.
  • Academic and industrial research platforms for studying gate oxide degradation mechanisms in wide-bandgap semiconductors.
Remarks
IDF: 1629
IP Status
Patent filed
Technology Readiness Level (TRL)
4
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Apparatus for Measuring a Gate Leakage Current of a Transistor

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