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"Optimal Clock Period Clustering for Sequential Circuits with Retiming,"
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"An Efficient Data Path Synthesis Algorithm for Behavioral-Level Power
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"A Postprocessing Algorithm for Crosstalk-Driven Wire Peturbation," with P.
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"Power Optimization of Multi-Level Logic Circuits Utilizing Circuit
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"A Complete Model for Glitch Analysis in Logic Circuit," with K. S. Chung,
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"G-vector: A New Model for Glitch Analysis in Logic Circuits," with K. S.
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"A Static Estimation Technique of Power Sensitivity in Logic Circuits," with
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*
*
*
"Coupling Delay Optimization by Temporal Decorrelation using Dual Threshold
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"Domino
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"Modularized
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"A
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"Noise-aware
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